Energy-efficient Batch Optimization Algorithms (E2BOA)
Photo: Rafal Rodzoch/Caiaimage/Getty Images
Funded by:
In the semiconductor industry, integrated circuits, otherwise known as chips, are manufactured on silicon wafers in fabrication halls known as wafer fabs, which usually comprise several hundred – often very expensive – machines set up in a clean room environment. Functionally similar machines are set up together in single machine groups. On-time delivery is very important due to the highly competitive nature of the market. Wafer fabs are among the most complex production systems in existence. Lots consisting of up to 50 wafers move through wafer fabs during processing. Depending on configuration, the machines process single wafers, batches or entire batches. A batch is a group of lots that are processed simultaneously on a batch machine. Oxidation and diffusion stages take place on batch machines in the high temperature zone of a wafer fab. The energy consumption of machines in the high temperature zone is very high due to process temperatures of up to 1500°C. During the preliminary work [1], the team investigated an innovated scheduling model problem for groups of identical batch machines. This work is based on the assumption of time-dependent price tariffs for energy costs. The total weighted delay of the batches and the energy cost incurred in executing the flow schedule are considered as conflicting performance measures. Pareto-optimal flow charts are determined using natural-analog methods called genetic algorithms. On average, savings of about 25% related to the highest occurring energy costs are observable. Flow charts with low energy costs lead to reduced carbon dioxide emissions.
read more
The model and the solutions being developed are being applied via the project “Energy-Efficient Batch Optimization Algorithms (E2BOA)” (funded by the NRW Ministry of Economic Affairs, Industry, Climate Action and Energy as part of their “Program for Rational Energy Use, Renewable Energies and Energy Saving – progres.nrw – Program Area Research”) in such a way that they are easier to use practically in a wafer fab. The algorithms from [1] are being modified to allow them to handle a varying batch size per machine and batch family, as well as the very large instances found in practice. In addition to this, procedures are being developed to deal with uncertainties regarding the arrival of batches upstream of the machine group in the algorithms.
Literature:
Rocholl, J., Mönch, L., Fowler, J. (2020): Bi-criteria Parallel Batch Machine Scheduling to Minimize Total Weighted Tardiness and Electricity Cost. Journal of Business Economics, 90, 1345–1381. https://link.springer.com/article/10.1007/s11573-020-00970-6
Press Releases
- “Optimierung der Halbleiterproduktion wird gefördert.” (07.05.2021) (in German only)
Head of Project
Photo: Photo: Hardy Welsch
Prof. Dr. Lars Mönch
Email: lars.moench
Faculty of Mathematics and Computer Science
Department of Enterprise-Wide Software Systems
